? semiconductor components industries, llc, 2015 february, 2015 ? rev. 5 1 publication order number: ESD5381/d ESD5381 series esd protection diodes micro?packaged diodes for esd protection the ESD5381 series are designed to protect voltage sensitive components from esd. excellent clamping capability, low leakage, and fast response time provide best in class protection on designs that are exposed to esd. because of their small size, they are suited for use in cellular phones, mp3 players, digital cameras and many other portable applications where board space comes at a premium. specification features ? low capacitance ? low clamping voltage ? small body outline dimensions: 0.60 mm x 0.30 mm ? low body height: 0.3 mm ? low leakage ? response time is < 1 ns ? iec61000?4?2 level 4 esd protection ? iec61000?4?4 level 4 eft protection ? these devices are pb?free, halogen free/bfr free and are rohs compliant mechanical characteristics qualified max reflow temperature: 260 c device meets msl 1 requirements maximum ratings rating symbol value unit iec 61000?4?2 (esd) contact air 8 kv total power dissipation on fr?5 board (note 1) @ t a = 25 c thermal resistance, junction?to?ambient p d r ja 300 400 mw c/w junction and storage temperature range t j , t stg ?55 to +150 c lead solder temperature ? maximum (10 second duration) t l 260 c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. fr?5 = 1.0 x 0.75 x 0.62 in. see application note and8308/d for further description of survivability specs. device package shipping ? ordering information ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our t ape and reel packaging specification s brochure, brd8011/d. www. onsemi.com ESD5381mut5g x3dfn2 (pb?free) 15000 / tape & reel x3dfn2 case 152af marking diagram 1 cathode 2 anode pin 1 x = specific device code m = date code (specific marking on following page) x m esd5382mut5g x3dfn2 (pb?free) 15000 / tape & reel
ESD5381 series www. onsemi.com 2 electrical characteristics (t a = 25 c unless otherwise noted) symbol parameter i pp maximum reverse peak pulse current v c clamping voltage @ i pp v rwm working peak reverse voltage i r maximum reverse leakage current @ v rwm v br breakdown voltage @ i t i t test current *see application note and8308/d for detailed explanations of datasheet parameters. uni?directional tvs i pp i f v i i r i t v rwm v c v br v f electrical characteristics (t a = 25 c unless otherwise noted) device device marking v rwm (v) i r (na) @ v rwm v br (v) @ i t (note 2) i t c (pf) v c (v) @ i pp = 1 a v c max max min ma typ max max (note 3) per iec61000?4?2 (note 4) ESD5381mut5g j 3.0 100 6.1 1.0 12 13 10.5 figures 1 and 2 see below esd5382mut5g k 3.0 50 14.2 1.0 6 8 26.0 figures 3 and 4 see below product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 2. v br is measured with a pulse test current i t at an ambient temperature of 25 c. 3. surge current waveforms per figure 7. 4. for test procedure see figures 5 and 6 and application note and8307/d.
ESD5381 series www. onsemi.com 3 figure 1. ESD5381mut5g clamping voltage screenshot positive 8 kv contact per iec61000?4?2 figure 2. ESD5381mut5g clamping voltage screenshot negative 8 kv contact per iec61000?4?2 time (ns) 200 150 100 50 0 ?50 0 10 20 30 40 60 voltage (v) 50 time (ns) 200 150 100 50 0 ?50 ?50 ?45 ?40 ?35 ?30 ?20 ?15 ?10 voltage (v) ?25 ?5 0 0 10 20 30 40 50 60 ?50 0 50 100 150 200 figure 3. esd5382mut5g clamping voltage screenshot positive 8 kv contact per iec61000?4?2 time (ns) voltage (v) ?60 ?50 ?40 ?30 ?20 ?10 0 ?50 0 50 100 150 200 figure 4. esd5382mut5g clamping voltage screenshot negative 8 kv contact per iec61000?4?2 time (ns) voltage (v)
ESD5381 series www. onsemi.com 4 iec 61000?4?2 spec. level test volt- age (kv) first peak current (a) current at 30 ns (a) current at 60 ns (a) 1 2 7.5 4 2 2 4 15 8 4 3 6 22.5 12 6 4 8 30 16 8 i peak 90% 10% iec61000?4?2 w aveform 100% i @ 30 ns i @ 60 ns t p = 0.7 ns to 1 ns figure 5. iec61000?4?2 spec 50 50 cable tvs oscilloscope esd gun figure 6. diagram of esd test setup the following is taken from application note and8308/d ? interpretation of datasheet parameters for esd devices. esd voltage clamping for sensitive circuit elements it is important to limit the voltage that an ic will be exposed to during an esd event to as low a voltage as possible. the esd clamping voltage is the voltage drop across the esd protection diode during an esd event per the iec61000?4?2 waveform. since the iec61000?4?2 was written as a pass/fail spec for larger systems such as cell phones or laptop computers it is not clearly defined in the spec how to specify a clamping voltage at the device level. on semiconductor has developed a way to examine the entire voltage waveform across the esd protection diode over the time domain of an esd pulse in the form of an oscilloscope screenshot, which can be found on the datasheets for all esd protection diodes. for more information on how on semiconductor creates these screenshots and how to interpret them please refer to and8307/d. figure 7. 8 x 20 s pulse waveform 100 90 80 70 60 50 40 30 20 10 0 020406080 t, time ( s) % of peak pulse current t p t r pulse width (t p ) is defined as that point where the peak current decay = 8 s peak value i rsm @ 8 s half value i rsm /2 @ 20 s
ESD5381 series www. onsemi.com 5 package dimensions x3dfn2, 0.62x0.32, 0.355p, (0201) case 152af issue a notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. a b e d bottom view b e 2x l2 2x top view 2x a a1 0.05 c 0.05 c c seating plane side view dim min max millimeters a 0.25 0.33 a1 ??? 0.05 b 0.22 0.28 e 0.355 bsc l2 0.17 0.23 mounting footprint* dimensions: millimeters 0.74 1 0.30 0.31 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. 2 1 see application note and8398/d for more mounting details a m 0.05 b c a m 0.05 b c 2x 2x recommended pin 1 indicator (optional) d 0.58 0.66 e 0.28 0.36 on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other inte llectual property. a listing of scillc?s pr oduct/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typical s? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 ESD5381/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative
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